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1/66 STA450A september 2003 functions n xmradio service layer demultiplexing n channel auxiliary data management n conditional access control n service components extraction n service components decryption n high quality audio decoding with data rate from 24kbps to 96kbps n high quality speech decoding with data rate from 4kbps to 16kbps n 44.1 and 32khz sampling frequencies supported n synchronization error detection with sw indicators peripherals n high speed serial input interface (pcbitstream interface) n fully programmable serial pcm output interface n iec958 output (s/pdif) n data output port interface n conditional access processor interface (i2c master) n rs232 rx & tx interfaces n embedded system pll n embedded audio pll low power technology n 1.8v 0.18 m m technology n 3.3v capable i/os control n i2c slave control n device address: 1011100 description the STA450A is designed for digital radio receivers compatible with the xmradio sdars system and in- tegrates all the functions needed to perform the ser- vice layer and source decoding: C bitstream synchronization C service layer (sl) demultiplexing C auxiliary data management C conditional access (ca) control C service components extraction C service components decryption C audio and voice decoding the extracted audio and data are made available through different interfaces: C i2s audio output C s/pdif output C data output port tqfp80 ordering number: STA450A this device can be sold only to customers that have signed a license agreement with xm satellite radio. xmradio ? sdars service layer & source decoder
STA450A 2/66 figure 1. service layer and source decoder block diagram figure 2. pin connection input buffer output buffer audio port output interface (pcm i/f) spdiff output service layer demux decryption audio decoder dsp based rs232 i2c master (cap i/f) i2c slave (syscon i/f) gpio interface external interrupt lrckt oclk sckt sdo i958_out rs232_tx rs232_rx scl_m sda_m scl sda pc bitstream input interface (ussio 0) pcdc pcsd data port output interface (ussio 3) dp_en dp_clk dp_data 1 line nu event_irq cap_rst sys pll audio pll system & audio clocks reset_n clk_in clk_out filt_0 pcfs 7 lines nu pll_sync int1 int2 test 1 2 3 5 6 4 7 8 9 10 31 11 32 33 34 35 36 75 74 73 72 70 71 69 68 67 66 65 55 54 53 51 50 52 60 59 58 56 57 cap_rst (gpio_4) nu (gpio_5) sdo lrckt tqfp80 26 27 28 29 30 76 77 78 79 80 pll_sync (fit_5) clk_m1 sckt 21 22 23 24 25 49 48 46 45 47 12 13 14 15 16 scl_m 64 63 62 61 vdd10 37 38 39 40 nu (ussio0_lrclk) 44 42 41 43 17 18 19 20 vdd1 gnd1 dp_en rs232_tx vdd12 gnd10 apll_gnd filt_0 clk_out test1 clk_in test0 vdd2 gnd2 vdd_io1 sda_m vdd3 gnd3 scl sda apll_vdd nu vdd4 gnd4 clk_m0 nu (req) vdd5 gnd5 vdd_io2 pcfs (fit_2) vdd6 gnd6 nu (fit_1) gnd7 vdd7 gnd8 vdd8 vdd_io3 reset_n gnd9 vdd9 nu (it_0) gnd12 oclk dp_data dp_clk int1 (gpio_1) vdd11 gnd11 vdd_io4 nu (ussio1_lrclk) event_irq (gpio_0) rs232_rx i958_out nu (it_1) scan_mode nu (fit_3) nu (it_2) testb nu (fit_0) nu (fit_4) pcdc pcsd nu (ussio1_data) nu (ussio1_sclk) nu (ussio2_lrclk) nu (ussio2_data) nu (ussio2_sclk) int2 (gpio_2) test (gpio_3)
3/66 STA450A pin function n pin type function pad description 1,6,53 nu(it_1), nu(it_2), nu(it_0) i not used (must be connected to ground in functional mode) schmitt trigger buffer 2,9,15,23, 30,37,44,5 0,57,62,69 ,76 gnd1,gnd12 ground 3,10,16, 24,31,38,4 5,51,58,63 ,70,77 vdd1,vdd12 1.8v core supply voltage 4 test0 i test pin (must be connected to ground in functional mode) analog pad 5 clk_in i clock input schmitt trigger buffer 7 testb i test pin input pad buffer with active pull-up 8 cap_rst (gpio_4) i/o cap reset bi dir pad, 4ma output buffer with slew rate control 11,32,52,7 1 vdd_io1, vdd_io4 3.3v i/o supply voltage 12 clk_out o clock out 4ma output buffer with slew rate control 13 scl_m o i2c master serial clock 4ma output buffer with slew rate control 14 sda_m i/o i2c master serial data bi dir pad, 4ma output buffer with slew rate control 17,27,28,4 0 nu(fit_0), nu(fit_3), nu(fit_4), nu(fit_1) i not used (must be connected to ground in functional mode) schmitt trigger buffer 18 scan_mode i scan mode (must be connected to ground in functional mode) input pad buffer 19 apll_gnd analog ground for audio pll 20 apll_vdd 1.8v analog supply for audio pll 21 filt_0 pll filter analog pad 22 nu not used 25,26 clk_m1, clk_m0 i selection of input clock for the dsp core and peripherals input pad buffer 29 pll_sync (fit_5) i fractional audio pll sync. schmitt trigger buffer 33 pcdc i/o pc bitstream data clock schmitt trigger bi dir pad, 4ma output buffer with slew rate control 34 pcsd i/o pc bitstream serial data schmitt trigger bi dir pad, 4ma output buffer with slew rate control 35,41,46 nu(ussio0_lrclk) nu(ussio1_lrclk) nu(ussio2_lrclk) i/o not used (must be connected to ground in functional mode) schmitt trigger bi dir pad, 4ma output buffer with slew rate control 36 nu(req) o not used 4ma output buffer with slew rate control
STA450A 4/66 a more detailed description of each pad type can be found in section 4. note: after an hardware reset or power on all bi dir pins are configured as inputs. 39 pcfs(fit_2) i pc bitstream prc frame sync. schmitt trigger buffer 42,47 nu(ussio1_data) nu(ussio2_data) i/o not used (must be connected to ground in functional mode) schmitt trigger bi dir pad, 4ma output buffer with slew rate control 43,48 nu(ussio1_sclk) nu(ussio2_sclk) i/o not used (must be connected to ground in functional mode) schmitt trigger bi dir pad, 4ma output buffer with slew rate control 49 nu(gpio_5) i/o not used (must be connected to ground in functional mode) bi dir pad, 4ma output buffer with slew rate control 54 test1 i test pin input pad buffer with active pull-up 55 reset_n i hw reset (active low) schmitt trigger buffer 56 event_irq (gpio_0) i/o general interrupt (events, errors, data ready) bi dir pad, 4ma output buffer with slew rate control 59 scl i i2c slave serial clock schmitt trigger buffer 60 sda i/o i2c slave serial data bidir pad, 4ma output buffer with slew rate control 61 int1 (gpio_1) i/o dedicated errors interrupt bi dir pad, 4ma output buffer with slew rate control 64 int2 (gpio_2) i/o dedicates events interrupt bi dir pad, 4ma output buffer with slew rate control 65 test (gpio_3) i/o test pin bi dir pad, 4ma output buffer with slew rate control 66 dp_en i/o data port enable schmitt trigger bi dir pad, 4ma output buffer with slew rate control 67 dp_data i/o data port data schmitt trigger bi dir pad, 4ma output buffer with slew rate control 68 dp_clk i/o data port clock schmitt trigger bi dir pad, 4ma output buffer with slew rate control 72 lrckt o i2s left&right clock 4ma output buffer with slew rate control 73 sdo o i2s output data (pcm data) 4ma output buffer with slew rate control 74 sckt o i2s serial clock 4ma output buffer with slew rate control 75 oclk i/o oversampling clock schmitt trigger bidir pad, 4ma output buffer with slew rate control 78 i958_out o s/pdif output 4ma output buffer with slew rate control 79 rs232_tx o rs232 transmitter 4ma output buffer with slew rate control 80 rs232_rx i rs232 receiver (must be connected to ground in functional mode) schmitt trigger buffer pin function (continued) n pin type function pad description
5/66 STA450A absolute maximum ratings thermal data dc electrical characteristcs (t amb = -40 to 85c, v dd = apll_v dd = 1.65 to 1.95v, v dd_io = 3.0 to 3.6v unless otherwise specified). symbol parameter value unit v dd 1.8v power supply voltage -0.5 to 2.5 v v dd_io 3.3v power supply voltage -0.5 to 4 v apll_v dd 1.8v analog supply voltage -0.5 to 2.5 v v i voltage on input pin -0.5 to (v dd_io + 0.5) v v o voltage on output pin -0.5 to (v dd_io + 0.5) v t stg storage temperature -55 to +150 oc t oper operative ambient temperature -40 to +85 oc t j operative junction temperature -40 to +125 oc symbol parameter value unit r j-amb thermal resistance junction to ambient (1) (1) according to jedec specification on a 4 layers board 40 c/w symbol parameter conditions min typ max unit v dd 1.8v supply voltage 1.65 1.8 1.95 v v dd_io 3.3v supply voltage 3.0 3.3 3.6 v apll_v dd 1.8v analog supply voltage 1.65 1.8 1.95 v i dd v dd power supply current f clk = 23.92mhz; 56kbps audio stream; v dd =1.95v 110 140 ma i dd_io v dd_io power supply current f clk = 23.92mhz; 56kbps audio stream; v dd_io =3.6v; v dd =1.95v 24 40 ma i dd_apll apll_v dd power supply current f clk = 23.92mhz; apll_v dd =1.95v 0.5 1.2 ma p d power dissipation v dd = 1.8v; v dd_io = 3.3v 220 mw i il low level input leakage current 4) vi = 0v 1 m a i ih high level input leakage current 4) vi = v dd3 1 m a i oz tristare output leakage current 5) vo = 0v or v dd3 1 m a i pu pull-up current vi = 0v 40 120 m a r pu equivalent pull-up resistance 3) vi = 0v 50 k w v il low level input voltage 0.8 v v ih high level input voltage 2 v v ilhyst low level threshold input falling 0.8 1.35 v v ihhyst high level threshold input rising 1.3 2 v v hyst schmitt trigger hysteresy 1) 0.3 0.8 v
STA450A 6/66 note 1. guaranteed by design note 2. take into account 200 mv voltage drop in supply lines and input/output levels for frequency > 20mhz. note 3. guaranteed by ipu measurements note 4: performed on all the input pins excluded the pull-down ones note 5: performed on the i/o pins in tristate mode 1.0 functional description 1.1 pc bitstream interface the STA450A receives a serial data stream from the sta400a channel decoder via the pc bitstream inter- face. figure 3 shows the stream format outputs from the cdec (sta400a). figure 3. pc bitstream interface protocol table 1 shows the correspondence between cdec output clock divider register and the data rate on the bus symbol parameter conditions min typ max unit v ol low level output voltage 2) iol = 4ma 0.2 v v oh high level output voltage 2) ioh = 4ma 2.8 v c in input capacitance 1) 1.2 pf c out output capacitance 1) 1.9 pf c io i/o (bidir) capacitance 1) 2.1 pf i latchup i/o latching current 200 ma v esd electrostatic protection leakage<1 m a4000 v pcsd pcdc pcfs 432ms frame period clock tscc1 tscc2 prc_an prc_a1 prc_b1 prc_zn prc_z1 prc_bn pcsd pcdc pcfs dc electrical characteristcs (continued)
7/66 STA450A table 1. suggested cdec clock divider/output rate correspondence. the 432ms frame is divided in slots of 448 bytes; the minimum number af slots in a 432ms frame is 50, corre- sponding to a tslot of 8.64ms. the transmission is on bursts, whose duration can go from 299us up to 1.199ms (refer to table 1) according to the clock divider factor selected in the sta400a. an overview of the connection between the sta400a and the STA450A is given in figure 4. figure 4. sta400a/STA450A connection. the synchronization process is started after a pcfs pulse is received through a fast interrupt port (pin 39). in the case the pc bitstream is stopped or the clock line is perturbed, the pcfs signal is used to reset the firmware state machine in the pc bitsteam interface (STA450A); this mechanism guarantees the start of the resync pro- cess from a stable state. the pc bitstream interface receives the data and fills the header and the pc buffers; the header buffer contains the header byte 1, the header byte 2 and the service preamble, the pc buffer contains the payload channels data. 1.2 STA450A clocks generation system the STA450A clocks generation system is shown in figure 5: the 23.92mhz reference signal is entered in the pin clk_in and is used to generate an internal system clock, with a system pll, and an internal pcm clock, with an audio fractional pll . a clock is made available at the output through the pin clk_out. mclk (hz) divider f out (hz) t out (sec) t burst (sec) 23920000 2 11960000 8.361e-08 2.997e-04 4 5980000 1.672e-07 5.993e-04 6 3986667 2.508e-07 8.990e-04 8 2990000 3.344e-07 1.199e-03 cdec pcsd - data line pcdc - clock line pcfs tx/rx sclk fast it ussio header buffer pc buffer service layer dsp decrypt buffer audio buffer data buffer fast it mfp -pll sync
STA450A 8/66 figure 5. STA450A clocks generation system the system clock the system clock sent to the dsp core and the peripherals can be derived from 4 sources of clock and the se- lection is performed by m4. the control of m4 is performed by the 2 input pins (clk_m1 & clk_m0): C 00 sys_clk = clk_in C 01 sys_clk = clk_in divided by 2 C 10 sys_clk = sys_clockout C 11sys_clk = sys_clockout divided by 2 in the chip, the duty cycle of the internal system clock must be as close as possible 50%. when the sys_clk is derived from the external clock source ( clk_in ), the divider by 2 can be used to ensure a 50% duty cycle. when the sys_clk is derived from the system pll, the duty cycle of the sys_clockout signal is 50%. the divider by 2 can be used to slow down the clock at a lower frequency than the minimum that can achieve the system pll. the clk_out pad is driven by the sys_clk divided by a programmable division factor ranging from 1 to 16; the sys_clk frequency is divided by 2 * (n+1), where n is the value programmed with register sys_paddiv [3:0]. configuration equations for the system pll: x = pllsys_xmodulo mmdsp + core pcm interface ussio0 sysclk sysclk sysclk sysclk ussio1 ussio2 ussio3 internal_pcmclk mmio peripherals div md+1 pfd fref fin pll disable / 2 / 2 c3 r c vco div md+1 div md+1 switching circuit charge pump system pll sys_paddiv(3:0) sys_clockout / 2 (n+1) oclk clk_in clkout emulation unit rs232 interfaces host interface timers ext interrupt gpio i2c master io rom it remap frac0 m4 sys_clk m5 div md+1 pfd fref fin pll disable c3 r c vco div md+1 div md+1 audio sample counter switching circuit charge pump audio pll audio_clockout external filter frac0 d02au1415 f out 1 x1 + ------------- fref in n1 + ----------------- m1 reference 65536 ---------------------------- - ++ ?? ?? =
9/66 STA450A n = pllsys_nmodulo m = pllsys_mmodulo the system pll registers are configured through an indirection mechanism using the host_pll_add, host_pll_data and host_pll_cmd registers; the host_pll_cmd register allows to update the control registers of the pll. there are two levels of registers (level 1 & level 2). the first level of registers (level 1) is configured through the indirection mechanism. the second level of registers (level 2) is a copy of the previous level in order to update all the configuration bits at the same time. this mechanism avoids to have, during the configuration phase, intermediate configurations that are not in line with the final desired configuration. assuming a 23.92mhz clk input frequncy and clk_m[1:0] = 11, the default system frequency is 59.8mhz see also the register description. the audio pll the "internal_pcmclk" of STA450A can be provided by two different sources: the audio pll or the oclk port of the chip. the "m5" multiplexor and the direction of the oclk tri-state port are configured by the register host_pllpcm (address 0x12). an audio pll is embedded in STA450A. the particularity of STA450A audio pll is the possibility to modify the audio sampling frequency (lrckt) in steps of a few p.p.m. to compensate dynamically the audio sampling frequency offset between the receiver and the broadcasting station; this compensation produces a jittering effect outside the audible range. the STA450A receives from the sta400a (channel decoder) a dedicated signal every 432ms (pll_sync) and uses this signal to perform the audio sampling rate compensation; the control is done by the dsp core up- dating the internal pll registers. some pll configuration registers are made available to the user to configure the pcm output according to the used dac. the programmation for the desired fs should be accomplished for both the fs = 48khz and fs = 44.1khz families before the start-up of the dsp (write in the register 0 x 4d) the oclk frequency can be derived from the following formula: C x is the value of the host_apll48_xdiv register (host_apll441_xdiv) register. C m is the value of the host_apll48_mdiv register (host_apll441_mdiv) register. C n is the value of the host_apll48_ndiv register (host_apll441_ndiv) register. C frac is the decimal value of the concatenated registers host_apll48_lsb and host_apll48_msb (host_apll441_lsb and host_apll441_msb) as follows: frac = 256 * host_apll48_msb + host_apll48_lsb (= 256 * host_apll441_msb + host_apll441_lsb) the changes in the registers are not effective once the dsp has been started. oclk_freq 1 1x + ------------- 23.92mhz 1n + ---------------------------- m1 frac 65536 ----------------- ++ ?? ?? =
STA450A 10/66 according to the chosen oversampling factor, the following table permits to configure the dividers of the audio pll: see also the register description. 1.3 pcm output interface the decoded audio data can be output in serial pcm format. the interface consists of the following signals: sdo pcm serial data output sckt pcm serial clock output lrckt left/right channel selection clock the output samples precision is selectable from 16 to 24 bits/word by setting the output precision (16, 18, 20 and 24bits) with the host_pcmcnf register; the same register is used to output data either with the most sig- nificant bit first (ms) or least significant bit first (ls). figure 6 gives a description of the STA450A pcm output formats. the sckt signal is the bit clock for the serial output and is derived from the pcmclk (oclk) as in the following formula: sckt = oclk / 2*(host_pcmdiv + 1) the number of bits to be transmitted to the dac during one lrckt clock period depends on the dac precision (16, 18, 20 or 24bits) and on the mode used to transmit the data (lrckt_period equal to 16x2 or 32x2 sckt_period - refer to figure 6). the value of the host_pcmdiv register must be set accordingly to the previous consideration and to the dac oversampling factor (o_fac). C lrckt_period = 16x2 sckt_period host_pcmdiv = (o_fac/64) - 1 C lrckt_period = 32x2 sckt_period host_pcmdiv = (o_fac/128) - 1 see also the register description. o_fac n m frac x fs=48khz family 256 1 15 28756 15 384 1 14 26959 9 512 1 15 28756 7 fs=44.1khz family 256 1 15 64948 17 384 (default) 1 14 37691 10 512 1 15 64948 8
11/66 STA450A figure 6. pcm output formats 1.4 master interface i2c the i2c master interface is used by the STA450A to communicate with the external conditional access pro- cessor (cap) with the following protocol: a) write sequences 16 sc lk cyc les 16 sc lk cyc les lrclk pcm_out[2:0] pcm_out[2:0] pc m_ord = 0, pcm_pr ec is 16 bits mode m s l s m s m s m s l s l s l s lrclk pcm_out[2:0] pcm_out[2:0] pcm_out[2:0] pcm_out[2:0] pc m_ord = 1, pcm_pr ec is 16 bits mode 32 sc lk cy cles 32 sclk cycles m s l s m s l s 18, 20 or 24 bits 18, 20 or 24 bits 18, 20 or 24 bits 18, 20 or 24 bits 18, 20 or 24 bits 18, 20 or 24 bits 00 18, 20 or 24 bits 18, 20 or 24 bits m s l s 0 l s m s 0 0 m s 00 m s 0 l s l s pcm_format = 1 pc m _ d i f f = 1 pcm_format = 0 pcm_format = 0 pcm_format = 1 pc m _ d i f f = 0 pc m _ d i f f = 1 pc m _ d i f f = 0 l s m s m s l s msb ms b start slave address sub-ad dre ss @ w sa sa data to @ sa stop sub-address + single write sub-address initialization w : r/w bit = write sa : slave acknowledge @ : sub-ad dre ss v al ue start slave address sub-ad dre ss @ w sa sa data to @ sa sub-address + multiple write data to @+1 sa da ta to @+2 sa sto p start slave address sub-ad dre ss @ w sa sa stop
STA450A 12/66 b) read sequences 1.5 data output port the STA450A sends data through the data port. the data port consists of 3 lines: dp_clk, dp_data, dp_en. the communication protocol is in burst. the data changes on the dp_data line on the raising edge of the clock line dp_clk, the dp_en line defines when the data is valid; dp_data and dp_en must be sampled on the falling edge of dp_clk. the service component is output through the data port without adding a flag indicating the frame. the data port burst rate is selectable through the xm stack command dataport_ch_frequency (op- code 0x07) from 1 mhz to 12 mhz, the default rate is 2 mhz. figure 7. data port protocol waveform diagram 1.6 iec958 output (spdif) the spdif output is a fully iec958 formatted, single ended output for linear pcm output (left and right channel, 16,18, 20 & 24 bits) supporting the consumer mode. start slave ad- data r sa nma stop sing le read start sl av e address first data r sa stop multiple read ma seco nd da ta nm a sta rt sla ve ad dre ss sub-address w sa combined format : sub-address + single read data from @ w star slave ad- r sa nma stop sa sta rt slave address w sa su b-ad dress @ sa sta rt sl av e ad dre ss r sa da ta from @ + 1 ma data fro m @ nma stop r : r/w bit = read sa : slave acknow ledg e ma : master acknowledge nm a : n o m ast er a ckn ow le dg e (la st d at a) @ : sub-address value combined format : sub-address + multiple read dp_data dp_clk dp_en
13/66 STA450A 1.7 test interfaces (rs232) the STA450A provides a rs232 rx and a rs232tx interfaces for testing purposes. 2.0 i2c bus specification the STA450A supports the i2c protocol to communicate with the system controller; the STA450A is always a slave in its communication to the system controller. 2.1 communication protocol a data change on the sda line must only occur when sclki2c clock is low except for start and stop con- ditions. in that case, the transition is done when the clock is high. a start condition is identified by a high to low transition of the sda line while the clock signal is high. a start condition must precede any command for a data transfer. a stop condition is identified by a low to high transition of the sda line while the clock signal sclki2c is high. a stop condition terminates the communications between the ic and the master of the i2c bus. an acknowledge bit is used to indicate a successful data transfer. the bus transmitter, either the master or the slave, releases the sda line after sending 8 bits of data. during the 9th clock pulse, the receiver pulls the sda line to low to acknowledge the reception of 8 bits of data. during the data transfer, the i2c slave interface of the ic samples the sda line on the rising edge of the sclki2c clock. the sda signal has to be stable during the rising edge of the clock and the data can change only when the sclki2c clock line is low. 2.2 device addressing to start the communications between the master and the ic, the master must initiate the transfer with a start condition. then, the master has to send on the sda line 8 bits (msb first) corresponding to the device i2c ad- dress (7 bits) and the mode bit rw (read or write). the 7 most significant bits are the address of the device. for the STA450A the address is 0x5c (1011100 ad- dress on 7 bits). the 8th bit (lsb) selects a read (bit set to 1) or write (bit set to 0) operation. after a start condition, the ic i2c slave interface identifies on the i2c bus the device address and, if the address matches, the ic acknowl- edges this match on the sda line during the 9th bit time frame. the byte following the device identification byte is the address of the host register to be accessed. 2.2.1 sub-address initialization this mode is used for the initialization of the host address register (sub-address value). the host address reg- ister is the register that points the data register to be accessed (read or write). 2.2.2 "sub-address + single write" & "sub-address + multiple write" the second mode, the multiple write, exploits the autoincrementation of the sub-address pointer to avoid to ini- tialize, for sequential accesses of the host registers, the sub-address at each write operation. the length of a multiple write is limited to the size of the host register area (256 locations). after a writing in the i2c interface a interrupt is generated to the core if the system controller set the bit in the host_cmd0 register.
STA450A 14/66 2.2.3 "single read" & "multiple read" & "sub-address + single read" & "sub-address + multiple read" the single read operations are performed from the current sub-address value. the sub-address value can be initialized using the "sub_address" initialization" sequence presented in the previous transfer chart : see the "combined format - sub-address + single read" diagram in the following chart. the multiple read operations are performed from the current sub-address value and the sub-address register is automatically incremented at each access. the sub-address value can be initialized using the "sub_address ini- tialization" sequence presented in the previous transfer chart : see the "combined format - sub-address + mul- tiple read" diagram in the following chart. the length of a multiple read is limited to the size of the host register area (256 locations). a multiple read is terminated by a non master acknowledge followed by a stop condition. start slave address sub-ad dre ss @ w sa sa data to @ sa st op sub-address + single write sub-address initialization w : r/w bit = write sa : slave acknowledge @ : sub-address value start slave address sub-ad dre ss @ w sa sa data to @ sa sub-address + multiple write data to @+1 sa da ta to @+2 sa stop start slave address sub-ad dre ss @ w sa sa stop start slave ad- data r sa nma st op single read start slave address first data r sa stop multiple read ma second data nma st art slave address sub-address w sa combined format : sub-address + single read data from @ w st ar slave ad- r sa nma st o p sa start sl av e ad dre ss w sa sub-address @ sa st art slave address r sa data from @ + 1 ma data from @ nma sto p combined form at : sub-address + multiple read r : r/w bit = read sa : slave acknowledge ma : mast er a cknow le dg e nma : no master acknowledge (last data) @ : sub-addre ss valu e
15/66 STA450A 2.3 register map the dsp host interface includes 256 registers. host @ name register size mode sw reset hw reset comment 0x00 host_version 8 bits r 0x10 0x10 0x01 host_id 8 bits r 0x20 0x20 0x02 to 0x0f reserved 0x10 host_softreset 8 bits w na na soft reset of the dsp core and peripherals 0x11 host_plldata 8 bits r C w nc 0 data register to configure the different configuration registers 0x12 host_pllpcm 3 bits r C w nc 01 pcm clock direction configuration 0x13 host_cmd0 1 bit r C w 0 0 i2c interrupt request 0x14 to 0x17 reserved 0x18 host_pllcmd 8 bits r C w nc 0 command register to configure the plls 0x19 to 0x1b reserved 0x1c host_i2cdiv 6 bits r C w 0x0b 0x0b hold time value of the data on sda versus scl edges 0x1d host_plladd 8 bits r C w nc 0 address register to configure the different configuration registers 0x1e host_serialdivl 8 bits r C w 0x00 0x00 rs232 rate coeff l 0x1f host_serialdivh 8 bits r C w 0x00 0x00 rs232 rate coeff h 0x20 to 0x2a reserved 0x2b host_memory access 4 bits w 0x00 0x00 enables core to access ucode 0x2c to 0x39 reserved 0x3a host_clkstop 1bit w na 1 stops the clock to the core 0x3b to 0x3f reserved 0x40 host_softver 8 bits r C w na na software version (bcd) 0x41 host_eventinte0 8 bits r C w na na event interrupt enable bit[7:0] 0x42 host_eventinte1 8 bits r C w na na event interrupt enable bit[15:8] 0x43 host_eventinte2 8 bits r C w na na event interrupt enable bit[23:16] 0x44 host_eventinte3 8 bits r C w na na event interrupt enable bit[31:24] 0x45 host_eventint0 8 bits r C w na na event interrupt value bit[7:0] 0x46 host_eventint1 8 bits r C w na na event interrupt value bit[15:8]
STA450A 16/66 host @ name register size mode sw reset hw reset comment 0x47 host_eventint2 8 bits r C w na na event interrupt value bit[23:16] 0x48 host_eventint3 8 bits r C w na na event interrupt value bit[31:24] 0x49 host_errintel 8 bits r C w na na error interrupt enable bit[7:0] 0x4a host_errinteh 8 bits r C w na na error interrupt enable bit[15:8] 0x4b host_errintl 8 bits r C w na na error interrupt value bit[7:0] 0x4c host_errinth 8 bits r C w na na error interrupt value bit[15:8] 0x4d host_startup 8 bits r C w na na startup 0x4e host_pcmdiv 8 bits r C w na na pcm clock divider 0x4f host_pcmcnf 8 bits r C w na na pcm configuration 0x50 host_apll48_lsb (1) 8 bits r C w na na fractional pll lsb reference value for fs = 48khz family 0x51 host_apll48_msb (1) 8 bits r C w na na fractional pll msb reference value for fs = 48khz family 0x52 host_apll48_xdiv (1) 8 bits r C w na na fractional pll x divider for fs = 48khz family 0x53 host_apll48_mdiv (1) 8 bits r C w na na fractional pll m divider for fs = 48khz family 0x54 host_apll48_ndiv (1) 8 bits r C w na na fractional pll n divider for fs = 48khz family 0x55 host_apll441_lsb (1) 8 bits r C w na na fractional pll lsb reference value for fs = 44.1khz family 0x56 host_apll441_msb (1) 8 bits r C w na na fractional pll msb reference value for fs = 44.1khz family 0x57 host_apll441_xdiv (1) 8 bits r C w na na fractional pll x divider for fs = 44.1khz family 0x58 host_apll441_mdiv (1) 8 bits r C w na na fractional pll m divider for fs = 44.1khz family 0x59 host_apll441_ndiv (1) 8 bits r C w na na fractional pll n divider for fs = 44.1khz family 0x5a enable_it432 8 bits r C w na na enable control with frac pll 0x5b it432_conf 8 bits r C w na na edge configuration for it432 0x5c host_maxdev 8 bits r C w na na hax duration windows divider factor 0x5d host_decoder bitrate 8 bits r C w na na active audio decoder bitrate 0x5e host_bitstream synchro 8 bits r C w na na synchronization 0x5f host_dataport_bitrate 8 bits r C w na na data port bit rate 0x60 to 0x65 reserved 0x66 host_eventinte4 8 bits r C w na na event interrupt enable bit [7:0]
17/66 STA450A note: na: not applicable, nc: not change, r: read only, w: write only note1: these registers must be programmed before the start-up of the dsp (writing in register 0x4d) 2.4 register description host_version address : 0x00 type : r software reset : 0x10 hardware reset : 0x10 description the version register is read-only and is used to identify the ic cut . the version register holds the cut number (binary decimal encoded) host_id address : 0x01 type : r software reset : 0x20 hardware reset : 0x20 description the host_id register is read-only and is used to identify the ic on an application board. the id is fixed for all ic cut. the STA450A has the id 0xac. host @ name register size mode sw reset hw reset comment 0x67 host_eventinte5 8 bits r C w na na event interrupt enable bit [15:8] 0x68 host_eventint4 8 bits r C w na na event interrupt value bit [7:8] 0x69 host_eventint5 8 bits r C w na na event interrupt value bit [15:8] 0x6a reserved 0x6b audiodec result 8 bits r C w na na audio decoder result 0x6c host_mfc 8 bits r C w na na master frame counter (mfc) lsb part (7 bits) 0x6d to 0x7e command 8 bits r C w na na 0x7f host_page_ctrl 8 bits r C w na na more page indication and number of byte in the page 0x80 to 0xff data page 8 bits r C w na na 76543210 00 76543210 01
STA450A 18/66 host_softreset address : 0x10 type : w software reset : na hardware reset : na description when bit 0 of this register is set, a soft reset occurs. the command registers and the interrupt registers are cleared. the STA450A goes into idle mode. host_pllpcm address : 0x12 type : r - w software reset : nc hardware reset : 0x01 description 00 not used 01 the pcmclk pad is in input. this external pcmclk source is sent to the i2s pcm output. 10 the pcmclk pad is in output. the internal audio pll is generating the pcm clock for the i2s pcm output. 11 same case as 10 but the pcmclk is in tri-state mode host_plldata address : 0x11 type : r/w software reset : 0 hardware reset : 0 description data to be copied in the level 1 register for system pll. this register should be used in conjunction with registers host_pllcmd and host_plladd host_pllcmd address : 0x18 type : r/w software reset : 0 76543210 10 76543210 12 76543210 11 76543210 18
19/66 STA450A hardware reset : 0 description bit [1:0] 00: no action is performed on the configuration registers of the level 1. 01: read action of the configuration registers. during this phase, the content of a selected (by host_pll_add) configuration register of the level 1 is copied into the host_pll_data register. 10: write action of the configuration registers. during this phase, the content of the host_pll_data register is copied into a selected (by host_pll_add) configuration register of the level 1. 11: do not use. bit 2 the bit controls the transfer of the data between the level 1 and the level 2 for the system pll. when this bit is set, all the registers of the level 1 (sys_ndiv, sys_pdiv, sys_setuph, sys_setupl, sys_enable) are copied into the registers of the level 2 at the same time. when this bit is cleared, all the level 2 registers have a stable state independently of the level 1 registers. bit3 reserved bit 4 this bit must be used when switching from one system pll configuration to the other one. this bit must be used in conjunction with the bit [2]. host_plladd address : 0x1d type : r/w software reset : 0 hardware reset : 0 description in the follow table the description of the registers addressable by the host_plladd to control the system pll 76543210 1d add name size mode sw reset hw reset comment 3 pllsys_disable 1 r - w nc 0 system pll disable control 0 : system pll enabled 1 : system pll disabled 4 pllsys_f_low 8 r - w nc 0 8 low bits of fractional value for system pll 5 pllsys_f_high 8 r - w nc 0 8 high bits of fractional value for system pll 6 pllsys_s 5 r - w nc 2 s divider for system pll 7 pllsys_n 4 r - w nc 1 n divider for system pll 8 pllsys_x 7 r - w nc 0 x divider for system pll 9 pllsys_m 5 r - w nc 9 m divider for system pll 10(0xa) pllsys_update_frac 1 r - w nc 0 update fractional value for system pll 12(0xc) pllsys_paddiv 4 r - w nc 3 pad clock divider
STA450A 20/66 host_cmd0 address : 0x13 type : r/w software reset : 0 hardware reset : 0 description a write into the bits 0 of this register generates a interrupt to the dsp core host_i2cdiv address : 0x1c type : r/w software reset : 0x0b hardware reset : 0x0b description hold time = host_i2cdiv/fc where the fc is the dsp system frequency. host_serialdivh - host_serialdivl address : 0x1f - 0x1e type : r/w software reset : 0x00(host_serialdivh) - 0x00 (host_serialdivl) hardware reset : 0x00 (host_serialdivh) - 0x00 (host_serialdivl) description these registers are used to specify the frequency division factor of the system clock for the rs232 interface used for the emulation; bit rate = fc/(( host_serialdivh << 8) | host_serialdivl) host_memoryaccess address : 0x2b type : w software reset : na hardware reset : 0 description setting the bit 3 the core is enabled to access the ucode inside the memory 76543210 13 cmd0 76543210 1c div [5:0] 76543210 1f div [15:8] 1e div[7;0] 76543210 2b
21/66 STA450A host_clkstop address : 0x3a type : r software reset : na hardware reset : 0 description clearing the bit 0 the clock to the core is started. host_softver address : 0x40 type : r/w software reset : na hardware reset : na description the softver register is the version of the microcode which is running on the device (bcd). this register is updated just after a soft reset of the device. host_eventinte 0 -1 -2 -3 address : 0x44 - 0x41 type : r/w software reset : na hardware reset : na description these registers are associated to error condition inside the STA450A. the STA450A contains a 32 bits interrupt register associated with 32 bits enable register. a bit set in this register will enable the generation of an external interrupt on the interrupt line. the interrupt associated with each bit is given in the register int description. host_eventint 0 - 1 - 2 - 3 76543210 3a 76543210 40 76543210 44 inte[31:24] 43 inte[23:16] 42 inte[15:8] 41 inte[7:0] 76543210 48 int[31:24] 47 int[23:16] 46 int[15:8] 45 int[7:0]
STA450A 22/66 address : 0x48 - 0x45 type : r/w software reset : na hardware reset : na description these registers are associated to error condition inside the STA450A. a bit set in this table indicates the corresponding event has been occurred. whenever the corresponding bit in the inte table has been set an external interrupt is generated. to clear the bit a fast command has to be issued (see command description). name reg bit comment bac_authorization 0x45 0x01 the radio is entered in maintenance mode bac_deauthorization 0x02 the radio is entered in activation mode utc 0x04 universal time code response 0x08 i2c page ready to read by system controller crb_table_complete 0x10 the sdec have received the crb last block indication with new sequence number bic_servicelabel_0 0x20 received a new service label for selection in location 0 bic_programtypelabel_0 0x40 received a new program type label for selection in location 0 bic_serviceselection_0 0x80 received a new service selection message for selection in location 0 bic_songartistlabel_0 0x46 0x01 received a new song/artist label for selection in location 0 bic_channelreferncelabel_0 0x02 channel reference table changed for selection in location 0 adf_extartistlabel_0 0x04 received a new extended artist label for selection in location 0 adf_extsonglabel_0 0x08 received a new extended song label for selection in location 0 adf_text_0 0x10 received new text message for selection in location 0 adf_programstart_0 0x20 received a new program start indication for selection in location 0 adf_programend_0 0x40 received a new program end indication for selection in location 0 adf_programid_0 0x80 received a new program id indication for selection in location 0 adf_other_0 0x47 0x01 received a new other message for selection in location 0 bic_servicelabel_1 0x02 received a new service label for selection in location 1 bic_programtypelabel_1 0x04 received a new program type label for selection in location 1 bic_serviceselection_1 0x08 received a new service selection message for selection in location 1 bic_songartistlabel_1 0x10 received a new song/artist label for selection in location 1 bic_channelreferencelabel_1 0x20 channel reference table changed for selection in location 1 adf_extartistlabel_1 0x40 received a new extended artist label for selection in location 1 adf_extsonglabel_1 0x80 received a new extended song label for selection in location 1 adf_text_1 0x48 0x01 received new text message for selection in location 1 adf_programstart_1 0x02 received a new program start indication for selection in location 1 adf_programend_1 0x04 received a new program end indication for selection in location 1 adf_programid_1 0x08 received a new program id indication for selection in location 1 adf_other_1 0x10 received a new other message for selection in location 1 chnumchanged_0 0x20 the channel number is changed for sid extracted into location 0 chnumchanged_1 0x40 the channel number is changed for sid extracted into location 1
23/66 STA450A host_errinteh - host_errintel address : 0x4a - 0x49 type : r/w software reset : na hardware reset : na description these registers are associated to error condition inside the STA450A. the STA450A contains a 16 bit interrupt register associated with 16 bit enable register. a bit set in this register will enable the generation of an external interrupt on the interrupt line. the interrupt associated with each bit is given in the register int description. host_errinth - host_errintl address : 0x4b - 0x4c type : r/w software reset : na hardware reset : na description these registers are associated to error condition inside the STA450A. a bit set in this table indicates the corresponding event has been occurred. whenever the corresponding bit in the inte table has been set an external interrupt is generated. to clear the bit a fast command has to be issued (see command description). 76543210 4a inte[15:8] 49 inte[7:0] 76543210 4c int[15:8] 4b int[7;0] name reg bit comment service layer lost synchronization 0x4b 0x01 service layer lost synchronisation due to communication error with cdec tscc rserror 0x02 tscc have rs errors bitstream communication failure 0x04 the format of communication is not compatible with the bitstream input i/f. the dsp need to be restarted service layer incorrect status 0x08 service layer have reached an incorrect status. nobacfromcdec 0x10 the bac wasnt received from the cdec in the last frame rollback 0x20 error from decryption picioerror 0x40 communication error with the cap device audio decoder not working 0x80 error in the audio decoder nv memory unreadable 0x4c 0x01 data corrupted in the nvm extractionerror_0 0x02 some error occurs during extraction of channel in location 0, to obtain detailed situation system controller must raise a command. at the time of this command is raised the dsp clear the error buffer extractionerror_1 0x04 some error occurs during extraction of channel in location 1, to obtain detailed situation system controller must raise a command. at the time of this command is raised the dsp clear the error buffer
STA450A 24/66 host_startup address : 0x4d type : r/w software reset : na hardware reset : na description writing 0x01 in this register enables the STA450A sw to leave the wait mode and to start normal process. using this register is also possible select special mode for silicon evaluation before to set this register is mandatory to program the system pll , the audio fractional pll and to configure the pcm output format according to the application dac. host_pcmdiv address : 0x4e type : r/w software reset : na hardware reset : na description this register is red by STA450A before to leave the wait mode. the sclk signal is derived from the clock pcmclk. host_pcmdiv = (0_fac/64) -1 in 16 bit mode host_pcmdiv = (0_fac/128) -1 in 18/20/24 bit mode if pcm_div is set to 0, the sclk frequency is equal to the pcmclk frequency. host_pcmcnf address : 0x4f type : r/w software reset : na hardware reset : na description this register is red by STA450A before to leave the wait mode. pcm_prec bit [1:0] 00: 16 bits mode. 01: 18 bits mode 10: 20 bits mode 11: 24 bits mode 76543210 4d 76543210 4e 76543210 4f
25/66 STA450A invert_sclk bit 2 0: lrclk and pcm_out sampled on the falling edge of the sclk 1: lrclk and pcm_out sampled on the raising edge of the sclk format bit 3 0: the output is in i2s format. 1: the output is in sony format. invert_lrclk bit 4 0: lrclk = 0 (low) will select the left channel. 1: lrclk = 1 (high) will select the left channel pcm_dif bit 5 0: data are in the last sclk cycles of lrclk (right aligned) 1: data are in the first sclk cycles of lrclk (left aligned) pcm_ord bit 6 0: the transmission is done lsb first. 1: the transmission is done msb first. pcm_iec_chansel bit 7 0: no iec958 output. 1: iec958 output, data on i 2 s pin (pcsd) are no more valid. host_apll48_lsb address : 0x50 type : r/w software reset : na hardware reset : na host_apll48_msb address : 0x51 type : r/w software reset : na hardware reset : na description the host_apll48_lsb and the host_apll48_msb are considered logically concatenated and contain the fractional values for the audio fractional pll for the fs = 48khz family. the registers have to be programmed before the start_up of the dsp. host_apll48_xdiv address : 0x52 76543210 50 76543210 51 76543210 52
STA450A 26/66 type : r/w software reset : na hardware reset : na host_apll48_mdiv address : 0x53 type : r/w software reset : na hardware reset : na host_apll48_ndiv address : 0x54 type : r/w software reset : na hardware reset : na description the host_apll48_xdiv, host_apll48_mdiv and host_apll48_ndiv registers are used to configure the x, m and n divider of the audio fractional pll for the fs = 48khz family. the registers have to be programmed before the start_up of the dsp. . host_apll441_lsb address : 0x55 type : r/w software reset : na hardware reset : na host_apll441_msb address : 0x56 type : r/w software reset : na hardware reset : na description the host_apll441_lsb and the host_apll441_msb are considered logically concatenated and 76543210 53 76543210 54 76543210 50 76543210 51
27/66 STA450A contain the fractional values for the audio fractional pll for the fs = 44.1khz family. the registers have to be programmed before the start_up of the dsp. host_apll441_xdiv address : 0x57 type : r/w software reset : na hardware reset : na host_apll441_mdiv address : 0x58 type : r/w software reset : na hardware reset : na host_apll441_ndiv address : 0x59 type : r/w software reset : na hardware reset : na description the host_apll441_xdiv, host_apll441_mdiv and host_apll441_ndiv registers are used to configure the x, m and n divider of the audio fractional pll for the fs = 44.1khz family. the registers have to be programmed before the start_up of the dsp enable_it432 address : 0x5a type : r/w software reset : na hardware reset : na description enabling of the audio fractional pll control through the external 432ms interrupt on pin pll_sync. 0: disabled 1: enabled 76543210 52 76543210 53 76543210 54 76543210 5a
STA450A 28/66 it432_conf address : 0x5b type : r/w software reset : na hardware reset : na description allows to configure if the 432ms interrupt is rising or falling edge sensitive. 0: sensitive to falling edge 1: sensitive to rising edge host_maxdev address : 0x5c type : r/w software reset : na hardware reset : na description divider factor for deviation value window host_decoder bitrate address : 0x5d ty p e : r / w software reset : na hardware reset : na description audio decoder bit rate / 1k host_bitstreamsynchro address : 0x5e type : r/w software reset : na hardware reset : na description 01: not synchronised 10: synchronised 76543210 5b 76543210 5c 76543210 5d 76543210 5e
29/66 STA450A host_dataportbitrate address : 0x5f type : r/w software reset : na hardware reset : na description data port bit rate / 1k (for bitrates 3 128kbps 0xff is reported) 10: synchronised host_eventinte 4-5 address : 0x66 - 0x67 type : r - w software reset : na hardware reset : na description these registers are associated to event condition inside the sdec. the sdec contains a 16 bits interrupt register associated with 16 bits enable register. a bit set in this register will enable the generation of an external interrupt on the interrupt line. the interrupt associated with each bit is given in the register int description. host_eventint 4-5 address : 0x68 - 0x69 type : r - w software reset : na hardware reset : na description these registers are associated to event condition inside the sdec. a bit set in this table indicates the corresponding event has been occurred. whenever the corresponding bit in the inte table has been set an external interrupt is generated. to clear the bit a fast command has to be issued (see command description). 76543210 5f 76543210 66 inte[15:8] 67 inte[7:0] 76543210 68 int[15:8] 69 int[7:0] name reg bit comment fast extraction loc0 0x68 0x01 channel fast extraction for loc0 successful fast extraction loc1 0x02 channel fast extraction for loc1 successful
STA450A 30/66 host_ audiodecresult address : 0x6b type : r/w software reset : na hardware reset : na description upper nibble defines the decoder type: 0x10: ambe 0x20: aac lower nibble defines the audio decoder result. 0x00 data ok 0x01 error concealment (only for aac) 0x02 synchronization lost, output muted host_ mfc address : 0x6c type : r/w software reset : na hardware reset : na crw monitor list change 0x04 channel reference word list changed program type (bic 3) change 0x08 program type (bic 3) changed artist and song change 0x10 artist and song changed service label (bic 5) change 0x20 service label (bic 5) changed program label change 0x40 program label changed bic extended song label loc0 0x80 extended song label for loc0 changed bic text label loc0 0x69 0x01 text label for loc0 changed bic extended artist label loc0 0x02 extended artist label for loc0 changed bic extended song label loc1 0x04 extended song label for loc1 changed bic extended artist label loc1 0x08 extended artist label for loc1 changed bic text label loc1 0x10 text label for loc1 changed rfu 0x20 rfu 0x40 rfu 0x80 76543210 6b 76543210 6c name reg bit comment
31/66 STA450A description master frame counter lsb part (7 bits). host_page ctrl address : 0x7f type : r/w software reset : na hardware reset : na description bit 7 :more page to be download. this bit is used also as hand shake bit. the STA450A sets the bit as soon as the page is available and the system controller clears the bit using the dedicated fast command (see command description) as soon as the page has been read. in case the system controller sends a new command and the more bit is set, the STA450A clears it automatically. bit [6:0] :number - 1 of valid bytes in the current page 3.0 dsp commands quick reference references: service layer specification xm stack api specification 3.1 categories init 0x0x select 0x1x info 0x2x misc 0x3x fastcmd 0x5x 3.2 commands 76543210 7f more byte number-1 command opcode category description dsp_pwrup_req 0x00 init dsp initialization command dsp_pwrdwn_req 0x01 init dsp power down command force_update 0x02 init force update command change_dac_conf 0x03 init change dsp dac configuration command hard_mute 0x04 init hard mute/play command fade_in_out 0x05 init fade in/fade out command soft_mute 0x06 init soft mute/play command dataport_ch_frequency 0x07 init change the divider for data port service_check 0x10 select check the status of a service using sid
STA450A 32/66 command opcode category description channel_check 0x11 select check the status of a service using channel number channel_up_down 0x12 select channel search command program_up_down 0x13 select channel search trough program type command service_extract 0x14 select service extraction command extract_error 0x15 select request service extraction error information service_cancel 0x16 select cancel a service currently extracted command service_routing 0x17 select change the routing of an extracted command chncheck_list_req 0x18 select extract_status_req 0x19 select after fast extraction command the result is reported using this command chnstatus_list_req 0x1a select labelmon_list_req 0x1b select sib1_request 0x20 info sib 1 request serv_label_req (sib 2) 0x21 info sib 2 request artsng_label_req (sib 3) 0x22 info sib 3 request pty_label_req 0x23 info program type label request all_label_req 0x24 info all label request adf_program_id_req 0x25 info program id request adf_program_start_req 0x26 info program start request adf_program_end_req 0x27 info program end request adf_extartistlbl_req 0x28 info extended artist label request adf_extsonglbl_req 0x29 info extended song label request adf_text_req 0x2a info text message request bic_text_req 0x2c info bic text request channel_ref_req 0x2d info channel table request artsngchg_list_req 0x2e info progtype_list_req 0x2f info hwid_read_req 0x31 misc hw id request utc_req 0x32 misc universal time code and master frame counter request clear_data_req 0x34 misc proglabel_list_req 0x36 misc bic_label_req 0x37 misc ram
33/66 STA450A 3.3 dsp command description the commands are composed by two parts: the req one (request) and the cfm one (confirmation). the req has to be written in the command registers (0x6d - 0x7e); the cfm has to be read in the data page registers (0x80 - 0xff). after a req has been issued the STA450A replies with a cfm within 5 mfp (5 x 432ms). 3.3.1 dsp_pwrup_req command opcode category description display_mask_req 0x4c service this command must be issued before power up sdec_ver_req 0x4d service this command must be issued before power up the system controller can selected the version of the sdec fast_clear_event 0x50 fastr clear events and error bit according to applied mask fast_disable_req 0x51 fastr clear events and error interrupt enable bit according to applied mask fast_enable _req 0x52 fastr set events and errors interrupt enable bits according to applied mask fast_extract_req 0x53 fastr service extract in fast mode byte field value description 0 dsp_pwrup_req 0x00 dsp initialization request header 1 serv_label_size 8, 12, 16 display size for the service label. 2 gen_label_size 8, 12, 16 display size for the song label, artist label, and program label. byte field value description 0 dsp_ pwrup _cfm 0x80 dsp initialization confirm header 1 error_code 0x00 C no error 0x01 C cap_io_error 0x02 C invalid_nvm_image dsp power up error status 2 init_complete_status 0x04 C act_present 0x00 C act_absent activation status if both encryption keys are stored in memory, then dsp reports act_present. if no encryption keys are stored in memory, then dsp reports act_absent. 3 last_ear 0 C 3 last saved entered authorization rating (ear) 4 dsp_sw_version 0x00 C 0xff dsp software version 5 C 8 dsp_sw_date byte 5: month in bcd. byte 6: day in bcd. bytes 7,8: year in bcd. dsp release date. the bits are ordered from left to right. the msb is on the left and the lsb is on the right. b7, b6, b5, b4, b3, b2, b1, b0
STA450A 34/66 3.3.2 dsp_pwrdwn_req 3.3.3 force_update 3.3.4 change_dac_conf 3.3.5 hard_mute 9 C 12 last_crw0 last channel reference word (crw) for location zero reference: service layer specification 13 last_sc_type0 last service component type for location zero reference: service layer specification 14 C 17 last_crw1 last channel reference word (crw) for location one reference: service layer specification 18 last_sc_type1 last service component type for location one. reference: service layer specification 19 C 26 hwid hardware identification byte field value description 0 dsp_pwrdwn_req 0x01 dsp power down request header byte field value description 0 dsp_pwrdwn_cfm 0x81 dsp power down confirm header 1 C 2 error_code 0x01 C cap io error 0x02 C invalid image power down error code. byte field value description 0 force_update_req 0x02 force update request header byte field value description 0 force_update_cfm 0x82 force update request header byte field value description 0 change_dac_conf_req 0x03 dsp dac configuration request header 1 pcm_divider 2 pcm_configuration byte field value description 0 change_dac_conf_cfm 0x83 dsp dac configuration confirmation byte field value description 0 hard_mute_req 0x04 dsp hard mute request header 1 pcm_playmue 1 - play 2 - hard mute
35/66 STA450A 3.3.6 fade_in_out 3.3.7 soft_mute byte field value description 0 hard_mute_cfm 0x84 dsp hard mute confirmation byte field value description 0 fade_in_out _req 0x05 dsp fade in/out request header 1 nr_fadeout_frames 0x03 C default number of fadeout frames until mute state is reached for frequencies less than 32kbps 2 nr_fadein_frames 0x05 C default number of fadein frames until regular state is reached for frequencies less than 32kbps 3 nr_valide_frames 0x05 C default number of valid frames before fadein starts for frequencies less than 32kbps 4 cmftnoiselimit 0x00 C min 0x01 C default 0x64 (100) C max this parameter give the maximum level for comfort noise. this must be the percentage value respect to the maximum (for frequencies less than 32kbps) 5 nr_fadeout_frames 0x06 C default number of fadeout frames until mute state is reached for frequencies greater than 32kbps 6 nr_fadein_frames 0x05 C default number of fadein frames until regular state is reached for frequencies greater than 32kbps 7 nr_valide_frames 0x05 C default number of valid frames before fadein starts for frequencies greater than 32kbps 8 cmftnoiselimit 0x00 C min 0x01 C default 0x64 (100) C max this parameter give the maximum level for comfort noise. this must be the percentage value respect to the maximum (for frequencies greater than 32kbps) byte field value description 0 fade_in_out _cfm 0x85 dsp fade in/out confirmation 1 command status 0x01 = success 0xff = command not executed byte field value description 0 soft_mute_req 0x06 dsp soft mute request header 1 soft_playmute 0 C play 1 C soft mute byte field value description 0 soft_mute_cfm 0x86 dsp soft mute confirmation
STA450A 36/66 3.3.8 dataport_ch_frequency 3.3.9 service_check byte field value description 0 dp_cf_req 0x07 data port change frequency request header 1 data port frequency divider max. 0x05 C 12 mhz default 0x1e C 2 mhz min. 0x3c C 1mhz system clock divider. e.g. divider = 0x1e (30) dpclk = (sysclk / 12); dpclk = (60 mhz / 12) = 2 mhz byte field value description 0 dp_cf_cfm 0x87 data port change frequency confirmation byte field value description 0 service_check_req 0x10 service check request header 1 sid 1-255 service identifier 2 extract_type 0x00 C audio 0x01 C data service type to extract. mmi can extract the audio or data service component. byte field value description 0 service_check_cfm 0x90 service check confirm header 1 service_check_status bit 7 C service present 0x80 C sid_present 0x00 C sid_absent bit 6 C pc forma t 0x40 C pc_standard 0x00 C pc_nonstandard bit 5 C service on-air 0x20 C service_onair 0x00 C service_offair bit 4 C service type 0x10 C type_present 0x00 C type_absent bit 3 C service free 0x08 C service_free 0x00 C service_notfree bit 2 C activation 0x04 C act_present 0x00 C act_absent bit 1 C authorization 0x02 C auth_present 0x00 C auth_absent b0 C reserved the bits are ordered from left to right. the msb is on the left and the lsb is on the right. b7, b6, b5, b4, b3, b2, b1, b0 2 channel_number 1 C 255 channel number for the service 3,4,5,6 crw channel reference word reference: service layer specification.
37/66 STA450A 3.3.10 channel_check 3.3.11 channel_up_down byte field value description 0 channel_check_req 0x11 channel check request header 1 channel_number 1-255 channel number 2 extract_type 0x00 C audio 0x01 C data service component type to extract. mmi can extract the audio or data service component. byte field value description 0 channel_check_cfm 0x91 channel check confirm header 1 service_check_status bit 7 C service present 0x80 C sid_present 0x00 C sid_absent bit 6 C pc format 0x40 C pc_standard 0x00 C pc_nonstandard bit 5 C service on-air 0x20 C service_onair 0x00 C service_offair bit 4 C service type 0x10 C type_present 0x00 C type_absent bit 3 C service free 0x08 C service_free 0x00 C service_notfree bit 2 C activation 0x04 C act_present 0x00 C act_absent bit 1 C authorization 0x02 C auth_present 0x00 C auth_absent b0 C reserved the bits are ordered from left to right. the msb is on the left and the lsb is on the right. b7, b6, b5, b4, b3, b2, b1, b0 2,3,4,5 crw channel reference word reference: service layer specification 6 sib1_status 0x00 C sib1_absent 0x01 C sib1_present if service information block 1 was not received, then dsp returns sib1_absent. if service information block 1 was received, then dsp returns sib1_present 7 to 14 service_block1 service information block 1 reference: service layer specification. byte field value description 0 channel_updwn_req 0x12 channel up/down request header 1 direction 0x00 C up 0x01 - down direction to search 2 channel_start_number 1-255 channel start number 3 channel_end_number 1-255 channel end number 4 extract_type 0x00 C audio 0x01 C data service type to extract. mmi can extract the audio or data service component.
STA450A 38/66 3.3.12 program_up_down byte field value description 0 channel_updwn_cfm 0x92 channel up/down confirm header 1 search_status bit 7 C search outcome 0x80 C search_successful 0x00 C search_fail bit 6 C extract type 0x40 C type_present 0x00 C type_absent bit 5 C reserved bit 4 C reserved bit 3 C reserved bit 2 C reserved bit 1 C reserved bit 0 C reserved the bits are ordered from left to right. the msb is on the left and the lsb is on the right. b7, b6, b5, b4, b3, b2, b1, b0 2 channel_number 1 C 255 channel number 3,4,5,6 crw channel reference word reference: service layer specification 7 sib1_status 0x00 C sib1_absent 0x01 C sib1_present if service information block 1 was not received, then dsp returns sib1_absent. if service information block 1 was received, then dsp returns sib1_present. 8 to 15 service_block1 service information block 1 reference: service layer specification byte field value description 0 program_updwn_req 0x13 program up/down request header 1 direction 0x00 C up 0x01 - down direction to search 2 channel_start_number 1-255 channel start number 3 channel_end_number 1-255 channel end number 4 program_type 1-31 program type 5 extract_type 0x00 C audio 0x01 C data service type to extract. mmi can extract the audio or data service component. byte field value description 0 program_updwn_cfm 0x93 program up/down confirm header 1 search_status bit 7 C search outcome 0x80 C search_successful 0x00 C search_fail bit 6 C extract type 0x40 C type_present 0x00 C type_absent bit 5 C reserved 0x20 C program_present 0x00 C program_absent bit 4 C reserved bit 3 C reserved bit 2 C reserved bit 1 C reserved bit 0 C reserved the bits are ordered from left to right. the msb is on the left and the lsb is on the right. b7, b6, b5, b4, b3, b2, b1, b0 2 channel_number 1 C 255 channel number for the service
39/66 STA450A 3.3.13 service_extract 3,4,5,6 crw channel reference word reference: service layer specification 7 sib1_status 0x00 C sib1_absent 0x01 C sib1_present if service information block 1 was not received, then dsp returns sib1_absent. if service information block 1 was received, then dsp returns sib1_present. 8 to 15 service_block1 service information block 1 reference: service layer specification byte field value description 0 service_extract_req 0x14 service extract request header 1 location 0x00 C location 0 0x01 C location 1 since dsp can extract two services simultaneously, xm stack assigns an extraction location. 2 C 3 pc_detect_time 0x0001 to 0xffff number of master frame that the dsp waits for the primary pcid or secondary pcid. 4 sid 1 C 255 service identifier 5 sc_type 0x03 C audio ambe 0x05 C audio aac+ 0x0a C trans. data service component type reference: service layer specification; page 21 6 primary_pcid 5 C 255 primary payload channel identification reference: transport layer specification 7 secondary_pcid 5 C 255 secondary payload channel identification reference: transport layer specification 8 routing 0x00 C no routing 0x01 C aud_port 0x02 C dat_port 0x03 C both_port routing information a data service component can only be routed to the data port (dat_port). an audio service component be routed to audio port (aud_port), data port (dat_port) or both the audio and data port (both_port). byte field value description 0 service_extract_cfm 0x94 service extract confirm header 1 location 0x00 C location 0 0x01 C location 1 0xff C command refused location assigned to the service. if the command was refused the location is set to 0xff. this can happen if the extraction of a component with routing for audio port is commanded and a component with routing audio port is already extracted in the other location or if an inexistent location is passed to the dsp
STA450A 40/66 3.3.14 extract_error 2 extract_error_status bit 7 C pc detect 0x80 C pcid_undetected 0x00 C pcid_detected bit 6 C service detect 0x40 C sid_undetected 0x00 C sid_detected bit 5 C sc type detect 0x20 C sct_undetected 0x00 C sct_detected bit 4 C authorisation 0x10 C auth_missing 0x00 C auth_ok bit 3 C ear low 0x08 C ear_low 0x00 C ear_ok bit 2 C rat block 0x04 C rat_block 0x00 C rat_ok bit 1 C rat low 0x02 C rat_low 0x00 C rat_ok b0 C tod rollback 0x01 C tod_rollback 0x00 C tod_ok the bits are ordered from left to right. the msb is on the left and the lsb is on the right. b7, b6, b5, b4, b3, b2, b1, b0 byte field value description 0 extract_error_req 0x15 extract error request header 1 location 0x00 C location 0 0x01 C location 1 0x02 C generic error (test only) dsp reports errors for the selected location or errors related to the data analysis and extraction (test only). byte field value description 0 extract_error_cfm 0x95 extract error confirm header 1 extract_error_status bit 7 C pc detect 0x80 C pcid_undetected 0x00 C pcid_detected bit 6 C service detect 0x40 C sid_undetected 0x00 C sid_detected bit 5 C sc type detect 0x20 C sct_undetected 0x00 C sct_detected bit 4 C authorisation 0x10 C auth_missing 0x00 C auth_ok bit 3 C ear low 0x08 C ear_low 0x00 C ear_ok bit 2 C rat block 0x04 C rat_block 0x00 C rat_ok bit 1 C rat low 0x02 C rat_low 0x00 C rat_ok b0 C tod rollback 0x01 C tod_rollback 0x00 C tod_ok the bits are ordered from left to right. the msb is on the left and the lsb is on the right. b7, b6, b5, b4, b3, b2, b1, b0. if the command is refused 0xff is returned
41/66 STA450A 3.3.15 service_cancel 3.3.16 service_routing 3.3.17 chcheck_list_req byte field value description 0 service_cancel_req 0x16 service cancel request header 1 location 0x00 C location 0 0x01 C location 1 since dsp can extract two services simultaneously, xm stack specifies which location to cancel. byte field value description 0 service_cancel_cfm 0x96 service cancel confirm header 1 location 0x00 C location 0 0x01 C location 1 dsp reports the extraction location that was cancelled. if the command is refused 0xff is returned byte field value description 0 service_routing_req 0x17 service routing request header 1 location 0x00 C location 0 0x01 C location 1 since dsp can extract two services simultaneously, xm stack specifies which location to change the routing 2 routing 0x00 C no routing 0x01 C audio_port 0x02 C data_port 0x03 C both_port routing information byte field value description 0 service_routing_cfm 0x97 service routing confirm header 1 location 0x00 C location 0 0x01 C location 1 location that changed routing. if the command is refused 0xff is returned 2 routing 0x00 C no routing 0x01 C audio_port 0x02 C data_port 0x03 C both_port new routing configuration. if the command is refused the old routing status is returned byte field value description 0 chncheck_list_req 0x18 channel check list request header 1 extract_type 0x00 C audio 0x01 - data mmi can extract the audio or data service component. 2 prog_type_flag 0x00 C false 0x01 - true if the mmi is requesting only the channels belonging to a program type, then the prog_type_flag is set to true. if the mmi is requesting all channels, then the prog_type_flag is set to false. 3 program_type 1 - 31 if the prog_type_flag is set to true, then the sdec reports the service labels that only belongs to this program type.
STA450A 42/66 3.3.18 extract_status_req byte field value description 0 chncheck_list_cfm 0x98 channel check list confirm header 1 command_status 0x01 - succesful 0xff - failure 2 channel_bit_mask00 bit 7 C channel 007 bit 6 C channel 006 bit 5 C channel 005 bit 4 C channel 004 bit 3 C channel 003 bit 2 C channel 002 bit 1 C channel 001 bit 0 C channel 000 channel mask 0 C channel status indication bits for channels 0 to channel 7. 3 channel_bit_mask01 bit 7 C channel 015 bit 6 C channel 014 bit 5 C channel 013 bit 4 C channel 012 bit 3 C channel 011 bit 2 C channel 010 bit 1 C channel 009 bit 0 C channel 008 channel mask 1 C channel status indication bits for channels 8 to channel 15. 4 channel_bit_mask02 bit 7 C channel 023 bit 6 C channel 022 bit 5 C channel 021 bit 4 C channel 020 bit 3 C channel 019 bit 2 C channel 018 bit 1 C channel 017 bit 0 C channel 016 channel mask 3 C channel status indication bits for channels 16 to channel 23. . . . 33 channel_bit_mask31 bit 7 C channel 255 bit 6 C channel 254 bit 5 C channel 253 bit 4 C channel 252 bit 3 C channel 251 bit 2 C channel 250 bit 1 C channel 249 bit 0 C channel 248 channel mask 32 C channel status indication bits for channels 248 to channel 255. byte field value description 0 extract_status_req 0x19 extract status request header 1 location 0x00 C location 0 0x01 C location 1 since sdec can extract two services simultaneously, xm stack specifies which location to get the extraction errors
43/66 STA450A 3.3.19 channel status_list_req byte field value description 0 extract_status_cfm 0x99 extract status confirm header 1 location 0x00 C location 0 0x01 C location 1 since sdec can extract two services simultaneously, system controller assigns an extraction location. 2 channel number 1-255 extracted channel number 3 sid 1-255 sid of location 0 extraction. 4 extraction status 0x00 C not initiated 0x01 C in progress 0x02 - ok 0x03 C incorrect parameter in command. 5 extract_error_status bit 7 C pc detect 0x80 C pcid_undetected 0x00 C pcid_detected bit 6 C service detect 0x40 C sid_undetected 0x00 C sid_detected bit 5 C sc type detect 0x20 C sct_undetected 0x00 C sct_detected bit 4 C authorization 0x10 C auth_missing 0x00 C auth_ok bit 3 C reserved bit 2 C rat block 0x04 C rat_blocked 0x00 C rat_unblocked bit 1 C rat low 0x02 C rat_low 0x00 C rat_ok b0 C tod rollback 0x01 C tod_rollback 0x00 C tod_ok the bits are ordered from left to right. the msb is on the left and the lsb is on the right. b7, b6, b5, b4, b3, b2, b1, b0 6 C 8 counter byte 6: lsb byte byte 7: middle byte byte 8: msb byte if status=0, counter = 0 for all other status, counter is #x432ms for actual time, counter will be running free until a channel is selected or initialized on the next fast extract command byte field value description 0 chnstatus_list_req 0x1a channel status list request header 1 start_channel_number 1 - 255 the channel number where the sdec starts the status check. 2 channel_number 1 to 32 max number of selectable channels will be returned 3 extract_type 0x00- audio 0x01 - data mmi can extract the audio or data service component.
STA450A 44/66 4 prog_type_flag 0x00 C false 0x01 - true if the mmi is requesting only the service labels belonging to a program type, then the prog_type_flag is set to true. if the mmi is requesting all service labels, then the progtype_filter_flag is set to false. 5 program_type 1 - 31 if the prog_type_flag is set to true, then the sdec reports the service labels that only belongs to this program type. 6 crw_report _flag 0x00 - false 0x01 - true if the crw_report-flag is set to true, then the sdec reports the crw for each selectable channel requested. 7 sib1_report_flag 0x00 C false 0x01 - true if the sib1_report_flag is set to true, then the sdec reports the program types for each selectable channel requested. 8 sib2_report_flag 0x00 C false 0x01 - true if the sib2_report_flag is set to true, then the sdec reports sib2t (service selectable) for each selectable channel requested. 9 sib3_report_flag 0x00 C false 0x01 - true if the sib3_report_flag is set to true, then the sdec reports sib3( artist name and song title) for each selectable channel requested. byte field value description 0 chnstatus_list_cfm 0x9a channel status list confirm header 1 - 2 size 0x0000 to 0x07a0 (bytes) size in byte of the channel status list confirm response. the size excluding byte 0, 1, 2 msb in byte 1. lsb in byte 2. 3 channel_number 1 - 255 the channel number of the first available service label. 4 service_check_status bit 7 C reserved bit 6 - pc format 0x40 C pc_standard 0x00 C pc_nonstandard bit 5 C service on-air 0x20 C service_onair 0x00 C service_offair bit 4 C reserved bit 3 C service free 0x08 C service_free 0x00 C service_notfree bit 2 C activation 0x04 C act_present 0x00 C act_absent bit 1 C authorization 0x02 C auth_present 0x00 C auth_absent b0 - reserved the bits are ordered from left to right. the msb is on the left and the lsb is on the right. b7, b6, b5, b4, b3, b2, b1, b0
45/66 STA450A 5 - 8 crw channel reference word reference: service layer specification revison 1.2, page 38 and 56. 9 sib1_status 0x00 - sib1_absent 0x01 - sib1_present 10 program_type0 1 - 31 the channels first program type. note if sib1 is absent, sdec inserts 0x00 for program type. 11 program_type1 1 - 31 the channels second program type. note if sib1 is absent, sdec inserts 0x00 for program type. 12 program_type2 1 - 31 the channels third program type. note if sib1 is absent, sdec inserts 0x00 for program type. 13 program_type3 1 - 31 the channels fourth program type. note if sib1 is absent, sdec inserts 0x00 for program type 14 sib2_status 0x00 C sib2_absent 0x01 C sib2_present sib2 status 15 to 30 service_label iso-8859-1 character set the service label (sib2). note if sib2 is absent, sdec inserts 0x00 for all 16 characters. 31 sib3_status 0x00 C sib3_absent 0x01 C sib3_present sib3 status 32 to 47 artist_name iso-8859-1 character set artist_name note if sib3 is absent, sdec inserts 0x00 for all 16 characters. 48 to 63 song_title iso-8859-1 character set song title note if sib3 is absent, sdec inserts 0x00 for all 16 characters. size - 61 channel_number 1- 255 the channel number of the last available service label size - 60 service_check_status same as above same as above size - 59 to size -54 crw channel reference word reference: service layer specification revison 1.2, page 38 and 56. size - 55 sib1_status 0x00 C sib1_absent 0x01 C sib1_present sib1 status
STA450A 46/66 3.3.20 labelmon_list_req size - 54 program_type0 1 - 31 the channels first program type. note if sib1 is absent, sdec inserts 0x00 for program type. size - 53 program_type1 1 - 31 the channels second program type. note if sib1 is absent, sdec inserts 0x00 for program type. size - 52 program_type2 1 - 31 the channels third program type. note if sib1 is absent, sdec inserts 0x00 for program type. size - 51 program_type3 1 - 31 the channels fourth program type. note if sib1 is absent, sdec inserts 0x00 for program type. size - 50 sib2_satus 0x00 C sib2_absent 0x01 C sib2_present sib2 status size - 49 to size - 32 service_label iso-8859-1 character set. the service label (sib2) note if sib2 is absent, sdec inserts 0x00 for all 16 characters size - 33 to size - 31 sib3_satus 0x00 C sib3_absent 0x01 C sib3_present sib3 status size - 32 to size - 15 artist_name iso-8859-1 character set. artist name note if sib3 is absent, sdec inserts 0x00 for all 16 characters size - 16 to size - 1 song_title iso-8859-1 character set. song title. note if sib3 is absent, sdec inserts 0x00 for all 16 characters byte field value description 0 labelmon_list_req 0x1b label monitor list request header 1 monitor_request 0x00 C monitor label changes for all channels. 0x01 (new) 0x03 (add) C monitor label changes for channels listed below (from byte 23 to byte 16). 0x01 means the start of a new list. 0x03 means the updating of a list. in this way giving this command more than 1 time you can choose every channel number to test 0x02 (new) C 0x04 (add) monitor label changes for channels that belongs to program types listed below (from byte 2 to byte 16) the channel monitor type. note if monitor request set to 0x00 (all channels), this command is only two byte.
47/66 STA450A 3.3.21 sib1_request 3.3.22 serv_label_req (sib 2) 2 channel_program0 for channel number values is: 1 C 255 for program type values is : 1 C 31 if monitor request is set to 0x01, this byte is a channel number (1-255). if the monitor request is set to 0x02, this byte is a program type (1-31). .. .. .. .. .. .. .. .. 17 channel_program15 for channel number values is: 1 C 255 for program type values is: 1 C 31 if monitor request is set to 0x01, this byte is a channel number (1-255). if the monitor request is set to 0x02, this byte is a program type (1-31). byte field value description 0 labelmon_list_cfm 0x9b label monitor list confirm header 1 monitor_request 0x00 C monitor label changes for all channels. 0x01/0x03 C monitor label changes for channels listed below (from byte 23 to byte16) 0x02/0x04 C monitor label changes for channels that belongs to program types listed below (from byte 2 to byte 16) the channel monitor type. note if monitor request set to 0x00 (all channels), this command is only two byte. byte field value description 0 service_selection_req 0x20 service selection request header 1 channel_number 1-255 channel number for which dsp returns the service selection contained in service information block 1. byte field value description 0 service_selection_cfm 0xa0 service selection confirm header 1 sib1_status 0x00 C sib1_absent 0x01 C sib1_present if sib1 was not received, then dsp returns sib1_absent. if sib2 was received, then dsp returns sib1_present. 2 sid 1-255 service identifier 3 C 10 service_block1 service information block 1 (sib1). the service selection is contained in sib1. reference: service layer specification. byte field value description 0 service_label_req 0x21 service label request header 1 channel_number 1-255 channel number for which dsp returns the service label.
STA450A 48/66 3.3.23 artsng_label_req (sib 3) 3.3.24 pty_label_req byte field value description 0 service_label_cfm 0xa1 service label confirm header 1 sib2_status 0x00 C sib2_absent 0x01 C sib2_present if sib2 was not received, then dsp returns sib2_absent. if sib2 was received, then dsp returns sib2_present. 2 sid 1-255 service identifier 3 C 18 service_block2 service information block 2 (sib2). the artist and song label are contained in sib2. reference: service layer specification byte field value description 0 artsng_label_req 0x22 artist/song label request header 1 channel_number 1-255 channel number for which dsp returns the artist/song label. byte field value description 0 artsng_label_cfm 0xa2 artist/song label confirm header 1 sib3_status 0x00 C sib3_absent 0x01 C sib3_present if sib3 was not received, then dsp returns sib3_absent. if sib3 was received, then dsp returns sib3_present 2 sid 1-255 service identifier 3 C 39 service_block3 service information block 3 (sib3). the artist and song label are contained in sib3. reference: service layer specification. byte field value description 0 program_label_req 0x23 program label request header 1 program_type 1 C 31 program type. the program type is used as an index into the program label table to obtain the program label. byte field value description 0 program_label_cfm 0xa3 program label confirm header 1 program_label_status 0x00 C proglabel_absent 0x01 C proglabel_present if the program label was not received, then dsp returns proglabel_absent. if the program label was received, then dsp returns proglabel_present.
49/66 STA450A 3.3.25 all_label_req 3.3.26 adf_program_id_req 2 C 17 program_label program label. reference: service layer specification byte field value description 0 all_label_req 0x24 all label request header 1 channel_number 1-255 channel number for which dsp returns the labels. 2 program_type 1 C 31 program type the program type is used as an index into the program label table to obtain the program label. byte field value description 0 all_label_cfm 0xa4 all label confirm header 1 sib2_status 0x00 C sib2_absent 0x01 C sib2_present if the service information block 2 was not received, then dsp returns sib2_absent. if the service information block 2 was received, then dsp returns sib2_present. 2 C 17 service_block2 service information block 2 (sib2). the service label is contained in sib2. reference: service layer specification 18 sib3_status 0x00 C sib3_absent 0x01 C sib3_present if the service information block 3 was not received, then dsp returns sib3_absent. if the service information block 3 was received, then dsp returns sib3_present. 19 - 55 service_block3 service information block 3 (sib3). the artist label and song label is contained in sib3. reference: service layer specification 56 program_label_status 0x00 C proglabel_absent 0x01 C proglabel_present if the program label was not received, then dsp returns proglabel_absent. if the program label was received, then dsp returns proglabel_present. 57 C 72 program_label program label. reference: service layer specification. byte field value description 0 program_id_req 0x25 program identification request header 1 sid 1-255 service identifier for which dsp returns the program identification. byte field value description 0 program_id_cfm 0xa5 program identification confirm header
STA450A 50/66 3.3.27 adf_program_start_req 3.3.28 adf_program_end_req 3.3.29 adf_extartistlbl_req 1 adf_status 0x00 C adf_absent 0x01 C adf_present if the program identification adf was not received, then dsp returns adf_absent. if the program identification adf was received, then dsp returns adf_present. 2 C 6 adf_progid program identification adf. reference: service layer specification. byte field value description 0 program_start_req 0x26 program start request header 1 sid 1-255 service identifier for which dsp returns the program start time. byte field value description 0 program_start_cfm 0xa6 program start confirm header 1 adf_status 0x00 C adf_absent 0x01 C adf_present if the program start adf was not received, then dsp returns adf_absent. if the program start adf was received, then dsp returns adf_present. 2 C 3 adf_progst program start adf. reference: service layer specification. byte field value description 0 program_end_req 0x27 program end request header 1 sid 1-255 service identifier for which dsp returns the program and time. byte field value description 0 program_end_cfm 0xa7 program end confirm header 1 adf_status 0x00 C adf_absent 0x01 C adf_present if the program end adf was not received, then dsp returns adf_absent. if the program end adf was received, then dsp returns adf_present. 2 C 3 adf_progend program end adf. reference: service layer specification. byte field value description 0 extart_label_req 0x28 extended artist label request header 1 sid 1-255 service identifier for which dsp returns the extended artist label. byte field value description
51/66 STA450A 3.3.30 adf_extsonglbl_req 3.3.31 adf_text_req 3.3.32 bic_text_req 0 extart_label_cfm 0xa8 extended artist label confirm header 1 adf_status 0x00 C adf_absent 0x01 C adf_present if extended artist adf was not received, then dsp returns adf_absent. if extended artist adf was received, then dsp returns adf_present. 2 C 34 adf_extart extended artist adf. reference: service layer specification. byte field value description 0 extsng_label_req 0x29 extended song label request header 1 sid 1-255 service identifier for which dsp returns the extended song label. byte field value description 0 extsng_label_cfm 0xa9 extended song label confirm header 1 adf_status 0x00 C adf_absent 0x01 C adf_present if extended song adf was not received, then dsp returns adf_absent. if extended song adf was received, then dsp returns adf_present. 2 C 34 adf_extsng extended song label adf. reference: service layer specification. byte field value description 0 channel_text_req 0x2a channel text request header 1 sid 1-255 service identifier for which dsp returns the text. byte field value description 0 channel_text_cfm 0xaa channel text confirm header 1 adf_status 0x00 C adf_absent 0x01 C adf_present if text adf was not received, then dsp returns adf_absent. if text adf was received, then dsp returns adf_present. 2 C 260 adf_text text adf. reference: service layer specification. byte field value description 0 bic_text_req 0x2c bic text request header 1 sid 1-255 service identifier for which dsp returns the text. byte field value description
STA450A 52/66 3.3.33 channel_ref_req 3.3.34 artsngchg_list_req 0 bic_text_cfm 0xac bic text confirm header 1 bic_text_status 0x00 Cabsent 0x01 C present if bic text was not received, then dsp returns absent. if bic text was received, then dsp returns present. 2 sid 1-255 sid 3 scroll_ narrowcast see specification scrolling and narrowcast information. reference: service layer specification; revision 1.4; section 8.11. 4 text_size 1-253 length of the text message. 5 to text_size + 4 text extended ascii bic text reference: service layer specification; revision 1.4; section 8.11. byte field value description 0 channel_table_req 0x2d channel table request header. 1 start_channel_number 1 - 225 dsp returns the channel reference table (crt) segment from start_channel_number to start_channel_number + 30. byte field value description 0 channel_table_cfm 0xad channel table confirm header 1 channel_number 1 - 225 starting channel number. 2 C 255 channel_ref_table channel reference table reference: service layer specification. byte field value description 0 artsngchg_list_req 0x2e artist/song change list request header byte field value description 0 artsng_list_cfm 0xae artist/song list confirm header 1 channel_bit_mask00 bit 7 C channel 007 bit 6 C channel 006 bit 5 C channel 005 bit 4 C channel 004 bit 3 C channel 003 bit 2 C channel 002 bit 1 C channel 001 bit 0 C channel 000 channel mask 0 C artist/song status indication for channels from 0 to 7.
53/66 STA450A 3.3.35 progtype_list_req 2 channel_bit_mask01 bit 7 C channel 015 bit 6 C channel 014 bit 5 C channel 013 bit 4 C channel 012 bit 3 C channel 011 bit 2 C channel 010 bit 1 C channel 009 bit 0 C channel 008 channel mask 1 C artist/song status indication for channels from 8 to 15. . . . 32 channel_bit_mask31 bit 7 C channel 255 bit 6 C channel 254 bit 5 C channel 253 bit 4 C channel 252 bit 3 C channel 251 bit 2 C channel 250 bit 1 C channel 249 bit 0 C channel 248 channel mask 1 C artist/song status indication for channels from 248 to 255. byte field value description 0 progtype_list_req 0x2f program type list request 1 req type 0x01 C program types availables on lineup 0x02 C program types selectable by the user byte field value description 0 progtype _list_cfm 0xaf program type list confirm header 1 cmd_response 0x01 - command succesfull 0xff C command fails the command can fails in case that the command byte 1 is wrong (a non implemented number) 1 progtype_bit_mask00 bit 7 C program type 07 bit 6 C program type 06 bit 5 C program type 05 bit 4 C program type 04 bit 3 C program type 03 bit 2 C program type 02 bit 1 C program type 01 bit 0 C program type 00 program type mask 0 C program type status indication bits for program type 0 to program type 7. 2 progtype_bit_mask01 bit 7 C program type 23 bit 6 C program type 22 bit 5 C program type 21 bit 4 C program type 20 bit 3 C program type 19 bit 2 C program type 18 bit 1 C program type 17 bit 0 C program type 16 program type mask 1 C program type status indication bits for program type 8 to program type 15.
STA450A 54/66 3.3.36 hwid_read_req 3.3.37 utc_req 3.3.38 clear_data_req 3 progtype_bit_mask02 bit 7 C program type 15 bit 6 C program type 14 bit 5 C program type 13 bit 4 C program type 12 bit 3 C program type 11 bit 2 C program type 10 bit 1 C program type 09 bit 0 C program type 08 program type mask 2 C program type status indication bits for program type 16 to program type 23. 4 progtype_bit_mask03 bit 7 C program type 31 bit 6 C program type 30 bit 5 C program type 29 bit 4 C program type 28 bit 3 C program type 27 bit 2 C program type 26 bit 1 C program type 25 bit 0 C program type 24 program type mask 3 C program type status indication bits for program type 24 to program type 31. byte field value description 0 hwid_read_req 0x31 hwid read request header byte field value description 0 hwid_read_cfm 0xb1 hwid read confirm header 1 C 8 hwid alphanumeric characters hardware identification (hwid). byte field value description 0 utdc_req 0x32 hwid read confirm header byte field value description 0 universal_time_cfm 0xb2 universal time confirm header 1 utc_status 0x00 C utc_absent 0x01 C utc_present if utc was not received, then dsp returns utc_absent. if utc was received, then dsp returns utc_present. 2 C 8 utc universal time. reference: transport layer. 9 C 11 mfc master frame counter reference: transport layer specification. byte field value description 0 clear_data_req 0x34 clear data request
55/66 STA450A 3.3.39 proglabel_list_req 3.3.40 bic_label_req 1 data_to_clear 0x01 C channel reference table 0x02 C program label 0x04 C sib 1 0x08 C sib2 0x10 C last channels selected 0x1fC all sections (except last channels selected) user data to clear byte field value description 0 clear_data_cfm 0xb4 clear data confirm 1 cmd result 0x01 C cmd succesfull 0xff C cmd fails command result. this command can fails because the byte 1 in the command buffer has a wrong number byte field value description 0 proglabel_list_req 0x36 program label list request byte field value description 0 proglabel_list _cfm 0xb6 program label list confirm header. 1 - 2 size 0x0000 C 0xffff size of the program label list confirm response. msb in byte 1. lsb in byte 2. 3 program_type 1 - 31 the first available program type. 4 - 19 program_label iso-8859-1 character set. program label. size 17 program_type 1 - 31 the last available program type. size 16 to size (1-2) program_label iso-8859-1 character set. program label. byte field value description 0 bic_label_req 0x37 bic label request 1 location 0x00 C audio 0x01 - data since sdec can extract two services simultaneously, xm stack assigns an extraction location. 2 extartist_label_flag 0x00 C no request 0x01 C get artist label if the system controller is requesting the extended bic artist label, then set this flag to 0x01. 3 extsong_label_flag 0x00 C no request 0x01 C get song label if the system controller is requesting the extended bic song label, then set this flag to 0x01.
STA450A 56/66 4 text_label_flag 0x00 C no request 0x01 C get bic text if the system controller is requesting the bic text label, then set this flag to 0x01. recommendation: it's strongly recommended that the system controller set the text_label_flag to 0x00. for bic text, its recommended system controller use bic_text_request command. byte field value description 0 bic_label_cfm 0xb7 bic label confirm header. 1 command_status 0x01 - succesful 0xff - failure command status 2 location 0x00 - location 0 0x01- location 1 since sdec can extract two services simultaneously, xm stack assigns an extraction location 3 sid 1 - 255 sid of extracted location. 4 extartist_flag 0x00 C absent 0x01 C present artist label present or absent from response. please note this octet is only present when the extartist_label_flag is set to 0x01 (present) in bic_label_req command. 5 to 6 extartist_size 1 to 80 artist label size please note this byte is only present when the extartist_label_flag is set to 0x01 (present). in bic_label_req command. 7 to (6+exartist_size) extartist_label iso-8859-1 character set artist name please note this byte is only present when the extartist_label_flag is set to 0x01 (present).in bic_label_req command note: the maximum size of the bic extended artist name is 80 bytes. therefore artist_size < = 80 bytes. artist_size +8 extsong_flag 0x00 C absent 0x01 C present song label present or absent from response please note this octet is only present when the extsong_label_flag is set to 0x01 (present) in bic_label_req command. artist_size + 9 to artist_size +10 extsong_size 1 - 80 song label size. please note this byte is only present when the extsong_label_flag is set to 0x01 (present).in bic_label_req command.
57/66 STA450A 3.3.41 display_mask_req artist_size + 11 to artist_size +10 extsong label iso-8859-1 character set song label please note this byte is only present when the extsong_label_flag is set to 0x01 (present) (present).in bic_label_req command note: the maximum size of the bic extended song title is 80 bytes. therefore song_size < = 80 bytes. artist_size +song_size + 12 bic_text_status 0x00 C absent 0x01 C present if bic text was not received, then dsp returns absent. if bic text was received, then dsp returns present.please note this octet is only present when the text_label_flag is set to 0x01 (present) in bic_label_req command artist_size + 13 to artist_size + 14 text_size 1 - 253 text size. please note this byte is only present when the text_label_flag is set to 0x01 (present). in bic_label_req command artist_size + 15 sid 1 - 255 sid of extracted location. please note this byte is only present when the text_label_flag is set to 0x01 (present) in bic_label_req command artist_size + song_size +16 scroll_narrowcast see specification scrolling and narrowcast information. please note this octet is only present when the text_label_flag is set to 0x01 (present) in bic_label_req command. reference: service layer specification; revision 1.4; section 8.11 artist_size + song_size +17 text_size 1-253 size of the text message please note this octet is only present when the text_label_flag is set to 0x01 (present) in bic_label_req command. artist_size + song_size +18 to artist_size + song_size + text_size + 17 scroll_narrowcast see specification bic text. please note this octet is only present when the text_label_flag is set to 0x01 (present) in bic_label_req command. reference: service layer specification; revision 1.4; section 8.11 byte field value description 0 display_mask_req 0x4c display mask request 1 service_label 8, 10, 16 service label display mask 2 artist_label 8, 10, 16 artist label display mask 3 song_label 8, 10, 16 song label display mask 4 program_label 8, 10, 16 program label display mask
STA450A 58/66 3.3.42 sdec_ver_req 3.3.43 fast_clear_event 3.3.44 fast_disable_int_req 3.3.45 fast_enable_int_req 3.3.46 fast_extract_req byte field value description 0 sdec_ver_req 0x4d read data request 1 sdec_version 0x21 hcmos 7 0x25 hcmos 8 sdec version number expected by system controller. byte field value description 0 fast_event_clr_req 0x50 event or error bit/s clear request 1 reg 0x45 C 0x48 0x4b C 0x4c event or error register to be written 2 mask mask to apply to the specified register (e.g. 0x01 clear bit 1 of the specified register) byte field value description 0 fast_disable_int_req 0x51 event or error interrupt/s disable request 1 reg 0x41 C 0x44 0x49 C 0x4a event and error enable interrupt register to be written 2 mask mask to apply to the specified register (e.g. 0x01 clear bit 1 of the specified register) byte field value description 0 fast_enable_int_req 0x52 event or error interrupt/s enable request 1 reg 0x41 C 0x44 0x49 C 0x4a event and error enable interrupt register to be written 2 mask mask to apply to the specified register (e.g. 0x01 set bit 1 of the specified register) byte field value description 0 fast_extract_req 0x53 fast extract request header 1 location 0x00 C location 0 0x01 C location 1 since dsp can extract two services simultaneously, xm stack assigns an extraction location. 2 channel_or_sid_flag 0x00 C use channel number given in byte 3. 0x01 C use sid given in byte 4 if channel number is used, then the sdec will get the sid and pcids from crw.
59/66 STA450A 4.0 i/o cells description) input pad buffer 2) input pad buffer with active pull-up 3 channel_number 1 - 255 channel number 4 sid 1 C 255 service identifier 5 extract_type 0x03 ambe 0x05 aac 0x0a trans_data service component type to extract. 6 primary_pcid 5 C 254 primary payload channel identification. sdec will check the pcid given by the system controller is still the same as the one in crw, if different, then the extraction fails and sdec sets the fast_extraction_completedx event bit. reference: transport layer specification; revision 1.2; page 40 7 secondary_pcid 5 C 254 secondary payload channel identification sdec will check the pcid given by the system controller is still the same as the one in crw, if different, then the extraction fails and sdec sets the fast_extraction_completedx event bit. reference: transport layer specification; revision 1.2; page 40 8 routing 0x00 C no routing 0x01 C aud_port 0x02 C dat_port 0x03 C both_port routing information a data service component can only be routed to the data port (dat_port). an audio service component is routed to audio port (aud_port), data port (dat_port) or both the audio and data port (both_port). a d98au906 z external pin input cap. a 1.3pf a d98au907a z 50k w external pin input cap. a 1.3pf
STA450A 60/66 3) schmitt trigger input pad buffer 4) output pad buffer, 4ma with slew rate control . 5) bidir pad buffer, 4ma with slew rate control. 6) schmitt trigger bidir pad buffer, 4ma with slew rate control. 7) analog pad buffer 5.0 timing diagram (guaranted by design) 5.1 audio dac interface (pcm) external pin input cap. a 1.3pf a d99au1072 z a d98au920 z external pin max load a 100pf en a zi d99au1074 a io external pin input cap. max load i/o 1.3pf 100pf en a d98au921 zi io external pin input cap. max load i/o 1.3pf 100pf a 550 sta400_1 z i/o external pin input cap. a 1.9pf
61/66 STA450A a) oclk in output. the audio pll is used to clock the dac notations: cload_xxx is the load in pf on the xxx output. pad_timing(cload_xxx) is the propagation delay added to the xxx pad due to the load. the following table gives this timing . tsdo_max = 3.5 + pad_timing(cload_sdo) - pad_timing(cload_oclk) tsckt_max = 4.0 + pad_timing(cload_sckt) - pad_timing(cload_oclk) tlrckt_max = 3.5 + pad_timing(cload_lrckt) - pad_timing(cload_oclk) the tr and tf depends on the load on the different pads but at a given load, the tr and tf timings are identical for oclk(output case), sckt, lrckt, sdo. b) oclk in input thi min = 5 ns tlo min = 5 ns toclk min = 25 ns tsdo_max = 5.5 + pad_timing(cload_sdo) ns load (pf) max pad_timing (rise) max pad_timing (fall) 25 6 ns 10.6 ns 50 10 ns 13 ns 75 12 ns 15.4 ns 100 14 ns 18 ns oclk (output) sdo sckt lrckt tr tf tsdo tsckt tlrckt oclk (input) sdo sckt lrckt tr tf tsdo tsckt tlrckt toclk thi tlo
STA450A 62/66 tsckt_max = 6.0 + pad_timing(cload_sckt) ns tlrckt_max = 5.5 + pad_timing(cload_lrckt) ns tr max = 20 ns tf max = 20 ns 5.2 reset_n the reset_n min duration (t_reset_low_min) is 10 us. the reset_n is active low. 5.3 clk_in the clk_in typical frequency is 23.92 mhz. the min high and low time are 5 ns. trise_clkin max = 16 ns tfall_clkin max = 16 ns 5.4 single bit inputs : pcfs, pll_sync the min pulse duration (high or low) on these inputs is 20 ns. trise max = 20 ns tfall max = 20 ns 5.5 single bit outputs : i958_out, event_irq(gpio_0), int1(gpio_1), int2(gpio_2), reset_n tr tf t_reset_low_min clk_in tr tf t_clkin_low_min t_clkin_high_min internal fit_*, it_* at least 1 dsp clk period interrupt sent to dsp core dsp clock pcfs, pll_sync tr tf t_high_min
63/66 STA450A cap_rst(gpio_4) pc bitstream interface : ussio interface in input (pcdc, pcsd) tpcsd_setup_min = 15 ns tpcsd_hold_min = 15 ns tpcdc_min_hi = 20 ns tpcdc_min_low = 20 ns tpcdc_min_period = 60 ns tr_max = 20 ns tf_max = 20 ns 5.6 ussio in output : data port output (dp_en, dp_data, dp_clk) notations: cload_xxx is the load in pf on the xxx output. pad_timing(cload_xxx) is the propagation delay added to the xxx pad due to the load. the following table gives this timing. t_dpen_max = 6.0 + pad_timing(cload_dp_en) - pad_timing(cload_dp_clk) load (pf) max pad_timing (rise) max pad_timing (fall) 25 6 ns 10.6 ns 50 10 ns 13 ns 75 12 ns 15.4 ns 100 14 ns 18 ns i958_out, event_irq(gpio_0), tr tf int1(gpio_1), int2(gpio_2), cap_rst(gpio_4) pcdc pcsd tpcsd_setup tpcsd_hold pcdc tpcdc_min_hi t_pcdc_min_low tpcdc_min_period dp_clk dp_data dp_en tr tf t_dpdata t_dpen
STA450A 64/66 t_dpdata_max = 6.0 + pad_timing(cload_dp_data) - pad_timing(cload_dp_clk) the tr and tf depends on the load on the different pads but at a given load, the tr and tf timings are identical for dp_clk, dp_data, dp_en. dp_data and dp_en must be sampled on the falling edge of dp_clk. load (pf) max pad_timing (rise) max pad_timing (fall) 25 6 ns 10.6 ns 50 10 ns 13 ns 75 12 ns 15.4 ns 100 14 ns 18 ns
65/66 STA450A dim. mm inch min. typ. max. min. typ. max. a 1.60 0.063 a1 0.05 0.15 0.002 0.006 a2 1.35 1.40 1.45 0.053 0.055 0.057 b 0.22 0.32 0.38 0.009 0.013 0.015 c 0.09 0.20 0.003 0.008 d 16.00 0.630 d1 14.00 0.551 d3 12.35 0.295 e 0.65 0.0256 e 16.00 0.630 e1 14.00 0.551 e3 12.35 0.486 l 0.45 0.60 0.75 0.018 0.024 0.030 l1 1.00 0.0393 k3.5 (min.), 7 (max.) tqfp80 (14x14x1.40mm) a a2 a1 seating plane c 20 21 40 41 60 61 80 e3 d3 e1 e d1 d e 1 b tqfp80l 0.10mm .004 pin 1 identification k l l1 0.25mm gage plane outline and mechanical data
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners ? 2003 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states www.st.com 66/66 STA450A

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